T1.timing

State of the art timing analysis

with industry-hardened methods and tools.

State of the art timing analysis...


...with industry-hardened methods and tools. T1 empowers and enables. T1 is the most frequently deployed timing tool in the automotive industry , being used for many years in hundreds of mass-production projects.
As a worldwide premiere, the ISO 26262 ASIL‑D certified T1-TARGET-SW allows safe instrumentation based timing analysis and timing supervision. In the car. In mass-production.

Use Cases

  • Timing measurement (e.g. max., min., average net execution times)
  • Target-side timing verification (supervision)
  • Automated timing tests
  • Coverage of requirements, which arise from ISO 26262
  • Implementation of the AUTOSAR Timing Extensions (TIMEX)
  • Timing debugging: quickly detect and solve even awkward timing problems
  • Exploration of free capacity, in oder to verify the timing effects of additional functionality before implementation, for example
  • Investigation of dataflows and event chains and synchronization effects in multi-core projects
  • Tracing of timing and functional problems without halting the target, particularly valuable in multi-core projects where it may be impractical to halt a single core

Extensions

T1.timing comes with two extension options. Add-on product T1.streaming provides the possibility to stream trace data continuously — over seconds, minutes, hours or even days. Add-on product T1.posix supports POSIX operating systems such as Linux or QNX.

T1 plug-ins

T1.timing comes with a modular concept and several plug-ins which are described in the following. Plug-ins can be easily enabled or disabled at compile-time using dedicated compiler switches such as T1_DISABLE_T1_CONT. To disable T1 altogether, it is sufficient to disable compiler switch T1_ENABLE which leaves the system in a state as of before the T1 integration.

T1.scope
T1.flex
T1.cont
T1.delay
T1.api
T1.diff
T1.mod

For RTOS-based projects: what is supported by T1?

For POSIX-based projects, see T1.posix.

Supported processors, compilers

Each row in the table below represents one set of T1 libraries specific to a certain processor core and a certain compiler.

Silicon/IP
Vendor
Core Architecture Compiler Availability
(Variant ID)
ISO26262
Version
Available
Controller Examples
Infineon TC1.6.X, TC1.8 TASKING VX-toolset V3.5.x.x (57) V3.6.0.0 TC2xx, TC3xx, TC4x
Infineon TC1.8 TASKING SmartCode V3.5.x.x (90) V3.6.0.0 TC4x
Infineon TC1.6.X, TC1.8 HighTec GCC V3.5.x.x (15) V3.6.0.0 TC2xx, TC3xx, TC4x
Infineon TC1.6.X, TC1.8 HighTec TriCore LLVM V3.5.x.x (91) V3.6.0.0 TC2xx, TC3xx, TC4x
Infineon TC1.6.X, TC1.8 Wind River V3.7.x.x (60) on request TC2xx, TC3xx, TC4x
Infineon TC1.6.X, TC1.8 Green Hills V3.5.x.x (73) on request TC2xx, TC3xx, TC4x
NXP/STM e200z0-z4, z6, z7 Green Hills V3.5.x.x (54) / On Request (65/72) V3.6.0.0 MPC57xx, MPC56xx, MPC55xx, SPC58xx, SPC57xx, SPC56xx, etc.
NXP/STM e200z2, z4, z7 HighTec GCC V3.5.x.x (44) V3.6.0.0 MPC57xx, MPC56xx, MPC55xx, SPC58xx, SPC57xx, SPC56xx, etc.
NXP/STM e200z2, z4, z7 Wind River V3.5.x.x (56) V3.6.0.0 MPC57xx, MPC56xx, MPC55xx, SPC58xx, SPC57xx, SPC56xx, etc.
ARM ARMv7-R: Cortex-R4, Cortex-R4F, Cortex-R5F Texas Instruments V2.5.8.0 (39) on request TMS570LS02x/03x/04x/05x/07x, TMS570LS11x/12x/21x/31x, TMS570LC43x, etc.
ARM ARMv7-R: Cortex-R4, Cortex-R4F, Cortex-R5F Green Hills V3.5.x.x (78) on request TMS570LS02x/03x/04x/05x/07x, TMS570LS11x/12x/21x/31x, TMS570LC43x, etc.
ARM ARMv7-R: Cortex-R4, Cortex-R4F, Cortex-R5F HighTec GCC V3.5.x.x (77) V3.6.0.0 TMS570LS02x/03x/04x/05x/07x, TMS570LS11x/12x/21x/31x, TMS570LC43x, etc.
ARM ARMv8-R: Cortex-R52 HighTec CLANG V3.5.x.x (87) on request ST SR6 Stellar, NXP S32S
ARM ARMv8-R: Cortex-R52 Green Hills V3.7.x.x (85) V3.6.0.0 ST SR6 Stellar, NXP S32S
ARM ARMv7-M: Cortex-M3, Cortex-M4 *, Cortex-M7 * GCC V3.7.x.x (82) on request Infineon Traveo II, LPC17xx, STM32F4xx, Atmel SAM V71, etc.
ARM ARMv7-M: Cortex-M3, Cortex-M4 *, Cortex-M7 * Green Hills V3.7.x.x (83) V3.6.0.0 Infineon Traveo-II, LPC17xx, STM32F4xx, Atmel SAM V71, etc.
ARM ARMv7-M: Cortex-M3, Cortex-M4 *, Cortex-M7 * Keil (ARM Compiler for Embedded) V3.7.x.x (84) on request Infineon Traveo-II, LPC17xx, STM32F4xx, Atmel SAM V71, etc.
ARM ARMv7-M: Cortex-M3, Cortex-M4 *, Cortex-M7 * IAR V3.7.x.x (69) on request Infineon Traveo-II, LPC17xx, STM32F4xx, Atmel SAM V71, etc.
ARM ARMv7-M: Cortex-M3, Cortex-M4 *, Cortex-M7 * TASKING V3.7.x.x (93) on request Infineon Traveo-II, LPC17xx, STM32F4xx, Atmel SAM V71, etc.
Renesas RH850 G3K/G3KH/G3M/G3MH/G4MH Green Hills V3.7.x.x (52) V3.6.0.0 RH850/C1x, RH850/F1x, RH850/P1x, RH850/E2x, etc.
Renesas RH850 G3K/G3KH/G3M/G3MH/G4MH Wind River On Request (53) on request RH850/C1x, RH850/F1x, RH850/P1x, RH850/E2x, etc.
Renesas RH850 G3K/G3KH/G3M/G3MH/G4MH Renesas V3.5.x.x (92) on request RH850/C1x, RH850/F1x, RH850/P1x, RH850/E2x, etc.
Texas Instruments C66x Texas Instruments V3.5.x.x (89) on request TMS320C66x, AWR2944, TDA3x

(*) Cortex-M4 adds DSP and FPU to Cortex-M3. Cortex-M7 further adds a 64-bit bus and double precision FPU. T1 uses the shared sub-set of the instruction sets.

Supported RTOSs

Vendor Operating System
Customer Any in-house OS**
Customer No OS - scheduling loop plus interrupts**
Elektrobit EB tresos AutoCore OS
Elektrobit EB tresos Safety OS
ETAS RTA-OS
GLIWA gliwOS
HighTec PXROS-HR
Hyundai AutoEver Mobilgene
KPIT Cummins KPIT**
Siemens Capital VSTAR OS
Micriμm μC/OS-II**
Vector MICROSAR-OS
Amazon Web Services FreeRTOS**
WITTENSTEIN high integrity systems SafeRTOS**

(**) T1 OS adaptation package T1-ADAPT-OS required.

Supported target interfaces

Target Interface Comment
CAN Low bandwidth requirement: typically one CAN message every 1 to 10ms. The bandwidth consumed by T1 is scalable and strictly deterministic.
CAN FD Low bandwidth requirement: typically one CAN message every 1 to 10ms. The bandwidth consumed by T1 is scalable and strictly deterministic.
Diagnostic Interface The diagnostic interface supports ISO14229 (UDS) as well as ISO14230, both via CAN with transportation protocol ISO15765-2 (addressing modes 'normal' and 'extended'). The T1-HOST-SW connects to the Diagnostic Interface using CAN.
Ethernet (IP:TCP, UDP) TCP and UDP can be used, IP-address and port can be configured.
FlexRay FlexRay is supported via the diagnostic interface and a CAN bridge.
Serial Line Serial communication (e.g. RS232) is often used if no other communication interfaces are present. On the PC side, an USB-to-serial adapter is necessary.
JTAG/DAP Interfaces exist to well-known debug environments such as Lauterbach TRACE32, iSYSTEM winIDEA and PLS UDE. The T1 JTAG interface requires an external debugger to be connected and, for data transfer, the target is halted. TriCore processors use DAP instead of JTAG.