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What is “T1 for POSIX”?

T1 version 3.2 introduced the support of POSIX operating systems through the add-on product T1.posix as an extension to T1.timing. Many operating systems for high-performance computing as well as the AUTOSAR AP standard are based on POSIX.

Key benefits of using T1 for the analysis of posix based systems

Live streaming of scheduling data from the target ECU
The T1-TARGET-SW traces at run-time and transmits the trace data via Ethernet to the
T1-HOST-SW. T1.timing in combination with T1.streaming and T1.posix offers the
following benefits:
  • The analysis and trace data visualization takes place simultaneously to streaming/recording
    data from the target ECU
  • Higher resource efficiency due to avoidance of costly file accesses
  • Traces of arbitrary lengths
T1 addresses the needs of the automotive
industry by supporting
  • Well-known timing results (e.g. CET, DT, RT, ...)
  • Visualization of AUTOSAR Deterministic Client Cycles
  • Combined and synchronized tracing of AUTOSAR CP/AP ECUs networks
  • Synchronized visualization and analysis of both system types in parallel and in the same view
  • Event chains (host-side)
  • Constraints (host-side)

Unique advantages of the T1 Timing suite compared to other solutions

  • Huge benefit in total cost of ownership because of single tooling for AUTOSAR CP/AP ECUs networks
  • No need to learn new tools since T1 is widely established in the automotive industry
  • One intuitive GUI covers all functionalities of T1.timing, T1.streaming and T1.posix
  • Flexible extension of T1 according to customer specific needs through dedicated engineering projects
  • Single point of contact for all questions around timing and resource analysis

Features of T1.timing V3.2 with add-on product T1.posix

Click on image to enlarge
Live streaming of scheduling data
- zoom in to see... ... detailed state information Graph view: CPU-load, CETs, RTs, DTs etc.Detailed view: colors indicating states of Processes and Threads over time
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For POSIX-based projects: what is supported by T1?

For RTOS-based projects, see T1.timing.

Supported processors, compilers

Each row in the table below represents one set of T1 libraries specific to a certain processor core and a certain compiler.
Silicon/IP
Vendor 		Core Compiler Availability
(Variant ID) 		ISO26262
Version
Available 		Controller Examples
ArmARMv8-A: Cortex-A5x, Cortex-A7xGCCV3.5.x.x (251/252/253)

✗

NVIDIA Tegra, NXP S32G, TI TDAx, etc.
Intelx86 64-bitGCCV3.5.x.x (254/255)

✗

Intel Atom Denverton, etc.

Supported RTOSs

VendorOperating System
ElektrobitEB corbos Linux
BlackBerryQNX7
Various VendorsEmbedded Linux (e.g. Yocto), Kernel >= 4.14

Supported target interfaces

Target Interface Comment
Ethernet (IP/UDP)UDP is used, IP-address and port can be configured.

Requirements regarding the host PC

  • Intel i7 or compatible CPU
  • GPU
  • SSD drive
  • 16GB RAM

Requirements for synchronized traces

  • Common (accessible) time-base for all relevant ECUs
  • T1 integrated on all relevant ECUs

Features released summer 2020

  • Synchronized AP/CP traces
  • Host-side constraints
  • Host-side event-chains
  • Reports generation
  • Memory information related to processes/threads
  • Message flow analysis (e.g. for QNX)
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Our brand new videos provide concrete and entertaining insights into the functions and advantages of the various components of the T1 Analysis Suite.

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The practice-oriented, book on methodology and analysis of embedded software timing. Numerous case studies help to avoid tricky problems, facilitate optimal use of processor resources and give many hints to secure correct runtime behavior.

Edited by Springer. Available as printed edition and eBook. Take a closer look here.
Now also available in Korea and China!
Peter Gliwa's coveted book was recently published in Korea and – in cooperation with the highly recognized Tsinghua University of Beijing – will also be available on the Chinese book market.

To find out more about T1 or to arrange a free presentation, just call:
+49 881 138522-70

T1 supports TC39x
Synchronized traces from 6 cores!
T1 makes it happen. Click here, to view a screenshot of T1 with 6 synchronized traces and some cross-core communications.

AURIX TC399

More details on the AURIX 2G can be found in Infineon's official press-release.
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