Engineering and Coaching
Do you require support with the conception and verification of the timing of
Are you embarking on a multi-core project?
With our many years of experience in the embedded software domain, in particular
on timing topics, we can help you to place your project on solid foundations.
Without the basis of secure timing, any embedded software project is at risk.
And the earlier the topic of timing is engaged, the better and the more
Whether deciding the architecture, establish the scheduling, planing and
executing timing tests, verifying run-time behavior or managing the
implementation, talk to us, we can help.
Embedded World 2019
Visit us at the Embedded World from February, 26th - 28th, 2019
, hall 4, stand 4-570
NEW product T1.accessPredictor
Upset by MPU exceptions in the field? T1.accessPredictor allows you to check for any memory access violations before even flashing the software. It will perform a
static analysis by disassembling the binary, building up the call-tree and identifying r/w memory accesses for each function. No source code required!
T1 supports TC39x
Synchronized traces from 6 cores!
T1 makes it happen. Click
, to view a screenshot of T1 with 6 synchronized traces and some cross-core communications.
More details on the AURIX 2G can be found in Infineon's official press-release
Multi-core in minutes
The AURIX based ATdemo
comes with a multi-core OS, a demo application and built-in T1 timing analysis. It was never easier to get started with multi-core.