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Resource optimization
As ever, resource optimization, especially of RAM, ROM and execution time but also of scheduling, has an important role in mass-production projects. It can reduce costs and increase reliability.

In many customer projects we demonstrated that, to some degree, something can be gained with little effort. The approach is very systematic. Initially, scheduling bottle-necks are inspected at the system level. Only at these places do code level optimizations offer a benefit. For example, optimising the idle task is unlikely to help. Apart from anything else, hot-spots can often be eased by modifying the scheduling and not the code.
When optimization at the code level is warranted, our detailed knowledge of common automotive processor architectures and widespread experience with optimizing compilers are invaluable.

Last but not least, we can deploy our timing suite T1, which is perfectly suited to guiding and measuring resource optimization.

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Open T1 training June, 12th/13th
Register for our first T1 open training session! The first day describes how T1 works and what features it offers. The optional second day is a hands-on session using our AURIX™ based ATdemo hardware.

T1 training

Interested? Then send an e-mail to sales@gliwa.com for more information.

T1 supports TC39x
Synchronized traces from 6 cores!
T1 makes it happen. Click here, to view a screenshot of T1 with 6 synchronized traces and some cross-core communications.

AURIX TC399

More details on the AURIX 2G can be found in Infineon's official press-release.

Multi-core in minutes
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The AURIX based ATdemo comes with a multi-core OS, a demo application and built-in T1 timing analysis. It was never easier to get started with multi-core.
Click here for details.
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